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[VHDL-FPGA-Verilog] 基于FPGA的直接数字合成器设计

Description: 1、 利用FLEX10的片内RAM资源，根据DDS原理，设计产生正弦信号的各功能模块和顶层原理图； 2、 利用实验板上的TLC7259转换器，将1中得到的正弦信号，通过D/A转换，通过ME5534滤波后在示波器上观察； 3、 输出波形要求： 在输入时钟频率为16KHz时，输出正弦波分辨率达到1Hz； 在输入时钟频率为4MHz时，输出正弦波分辨率达到256Hz； 4、 通过RS232C通信，实现FPGA和PC机之间串行通信，从而实现用PC机改变频率控制字，实现对输出正弦波频率的控制。-a use FLEX10-chip RAM resources, in accordance with DDS principle, design sinusoidal signal generated by the top-level functional modules and schematics; 2, the experimental board TLC7259 converters, will be a sinusoidal signal, the D/A conversion, after filtering through the ME5534 oscilloscope observation; 3, the output waveform requirements : the input clock frequency of 16KHz, sine wave output resolution of 1Hz; the input clock frequency of 4MHz, the sine wave output resolution of 256Hz; 4, RS232C communications, FPGA and PC serial communications between in order to achieve PC-frequency control characters, the realization of sine wave output frequency control.
Platform: | Size: 21504 | Author: 竺玲玲 | Hits:

[VHDL-FPGA-Verilog] k5

Description: 串口通信实验程序，用于FPGA和电脑串口通信研究-experimental procedure for FPGA serial communications and computer research
Platform: | Size: 1093632 | Author: 仇海亮 | Hits:

[Other Embeded program] UART_BooQuai

Description: FPGA上实现UART串口原程序，在ISE6编写的-FPGA serial UART to achieve the original procedure, the preparation of the ISE6
Platform: | Size: 11264 | Author: 樊 | Hits:

[Documents] UART(FPGA)

Description: 基于FPGA的串行通信UART控制器，采用VHDL语言编写，包含多个子模块。 在ISE或FPGA的其它开发环境下新建一个工程，然后将文档中的各个模块程序添加进去，即可运行仿真。源程序已经过本人的仿真验证。-FPGA-based UART serial communication controller, using VHDL language, includes a number of sub-module. ISE FPGA or in the other developing a new environment, then documentation of the various modules of procedures added to it, will be running simulation. I have been the source of the simulation.
Platform: | Size: 14336 | Author: 李浩 | Hits:

[VHDL-FPGA-Verilog] UART_ise7_bak

Description: 用FPGA 实现全双工异步串口（UART），与PC 机通信。1 位起始位；8 位数据位；一个停止位；无校验位；波特率为2400、4800、9600、11520 任选或可变（可用按键控制波特率模式）。-using FPGA full-duplex asynchronous serial port (UART), and PC communication. An initiation; 8 data spaces; One-stop; No Parity; Baud Rate for 2400,4800,9600, 11520 optional or variable (baud rate can be used to control keypad mode).
Platform: | Size: 32768 | Author: lee | Hits:

[VHDL-FPGA-Verilog] FPGA+DSS+UART

Description: 用FPGA实现任意波形发生器的源代码，另外还包括FPGA实现UART，从而与MCU实现串行通信。-Using FPGA to achieve arbitrary waveform generator of the source code, including the FPGA also realize UART, in order to realize serial communication with the MCU.
Platform: | Size: 2048 | Author: zhuangxb | Hits:

[source in ebook] fpga_uart

Description: 基于FPGA 实现异步串口可以值得参考。-Asynchronous FPGA-based serial port can be worth considering.
Platform: | Size: 10240 | Author: chenwei | Hits:

[VHDL-FPGA-Verilog] FPGA_EEPROM_load

Description: 大容量FPGA数据的EEPROM串行加载-Large-capacity FPGA serial EEPROM data is loaded
Platform: | Size: 201728 | Author: 火冰 | Hits:

[VHDL-FPGA-Verilog] cyclic

Description: FPGA的串口通信程序，可接受或者发送数据，通过Rs232口-FPGA serial communication program, acceptable, or send data through the RS232 port
Platform: | Size: 1307648 | Author: xianchunwwang | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: 用verilog实现的串口收发数据程序，已经调试通过-Using Verilog to send and receive data to achieve the serial procedures are debugging through
Platform: | Size: 2384896 | Author: 张西贝 | Hits:

[VHDL-FPGA-Verilog] serial-configuration-device(epcs1-epcs4)

Description: 在FPGA 开发过程中会遇到配制芯片选择的问题,这里介绍的串行配置器件,成本低,性能高-In the FPGA development process will encounter the problem of choice of the preparation of chips, where introduction of serial configuration devices, low cost, high-performance
Platform: | Size: 200704 | Author: sun huaiming | Hits:

[VHDL-FPGA-Verilog] AD9229-FPGA-files

Description: adi串行AD AD9229的控制使用ISE平台 Verilog语言 -adi serial ADAD9229 control the use of ISE platform Verilog language
Platform: | Size: 184320 | Author: 徐凯 | Hits:

[VHDL-FPGA-Verilog] wumayi

Description: 研究了传统误码仪的工作原理与结构，并利用VHDL语言在FPGA芯片上模拟实现了绝大部分的传统误码仪的功能，如LCD显示驱动，串口通信驱动，误码测试，数据存储芯片驱动等功能.-Research on the traditional instrument of the working principle of error with the structure and language use of VHDL simulation in the FPGA chip realize most of the traditional instrument error function, such as the LCD display driver, serial port communication driver, error testing, data storage Chip-driven functions.
Platform: | Size: 4048896 | Author: 张杰 | Hits:

[Com Port] FPGA

Description: 本文介绍了一种新的使用串行通信进行DSP远程在线编程方法。对设计中的主要技术：DSP与PC机的串口通信、Flash编程以及DSP自引导等进行了详细介绍。结合TI公司的TMS320VC33处理器，阐述了具体的实现方法-This paper introduces a new use of serial communications DSP remote online programming method. On the design of the main techniques: DSP and PC-serial communication, Flash programming as well as the DSP, such as self-guided introduction in detail. Combination of TI
Platform: | Size: 54272 | Author: roger | Hits:

[Other Embeded program] Serial

Description: FPGA与PC串口通信的Verilog HDL 程序-FPGA and the PC serial communication procedures Verilog HDL
Platform: | Size: 2048 | Author: feng | Hits:

[VHDL-FPGA-Verilog] RS232

Description: RS232串口通信协议，verilog实现，通过FPGA完全调通。-RS232 serial communication protocol, verilog achieved entirely through the FPGA transfer pass.
Platform: | Size: 3072 | Author: dingsheng | Hits:

[VHDL-FPGA-Verilog] FPGA-URAT

Description: FPGA与PC串口自动收发程序,verilog源程序-FPGA and the PC serial port automatically sending and receiving process, verilog source code
Platform: | Size: 3072 | Author: niuqs | Hits:

[VHDL-FPGA-Verilog] FPGA---Serial

Description: FPGA实现的串口程序，包含顶层调用的代码。-FPGA implementation of the serial program, including top-level calling code.
Platform: | Size: 4096 | Author: 周华飞 | Hits:

[Com Port] FPGA-RS232-verilog

Description: fpga上的串口驱动程序，包括接收主机来的数据（deserial）和发送由FPGA产生的数据(serial).该程序的调试需要借助串口调试助手-serial port driver on the fpga, including the receiving host to the data (deserial) and send the data generated by the FPGA (serial) to pc. The program needs the serial debug debugging assistant
Platform: | Size: 500736 | Author: yvaine | Hits:

[VHDL-FPGA-Verilog] FPGA-FPGA-serial

Description: FPGA 串口通信程序，调试通过绝对好使，与大家共享，适合初学者-FPGA serial communication program, debug, so that by the absolute, and share, for beginners
Platform: | Size: 6144 | Author: | Hits:
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